1) Field of the Invention
This invention relates generally to fabrication of a semiconductor device and more particularly to a method for forming a lightly doped source and drain (LDD) structure using an L-shaped spacer.
2) Description of the Prior Art
As semiconductor technology continues to advance, the physical geometry of semiconductor devices continually shrinks and the fabrication processes for forming semiconductor devices continually becomes more complex, significantly increasing manufacturing cost and cycle time. The number of masking and ion implant steps is an important factor in the manufacturing cost and cycle time of semiconductor fabrication.
Conventional CMOS fabrication processes require four masking steps and four ion implant steps to form source and drain regions with source and drain extensions (LDDs) that meet the performance requirements for modern CMOS devices. Following gate definition in a typical CMOS process, a PLDD (P-type lightly doped source and drain, P-type source and drain extension) mask is formed of photoresist, covering the area for the N-type transistor. P-type ions are implanted through the PLDD mask for the P-type source and drain extensions (PLDD), and the PLDD mask is removed. An NLDD (N-type lightly doped source and drain, N-type source and drain extension) mask is formed of photoresist, covering the area for the P-type transistor. N-type ions are implanted through the NLDD for the N-type source and drain extensions (NLDD), and the NLDD mask is removed. After sidewall spacers are formed on the P-type gate and on the N-type gate, a P+ source and drain (P-type heavily doped source and drain) implant mask is formed over the area for the N-type transistor. A heavy dose of P-type ions are implanted through the P+ source and drain implant mask, and the P+ source and drain implant mask is removed. N+ source and drain (N-type heavily doped source and drain) implant mask is formed over the area for the P-type transistor. A heavy dose of N-type ions are implanted through the N+ source and drain implant mask, and the N+ source and drain implant mask is removed. A need exists for a process for forming source and drain regions and source and drain extensions with a reduced number of masking steps and ion implant steps.
The importance of overcoming the various deficiencies noted above is evidenced by the extensive technological development directed to the subject, as documented by the relevant patent and technical literature. The closest and apparently more relevant technical developments in the patent literature can be gleaned by considering the following patents.
U.S. Pat. No. 4,908,326 (Ma et al.), U.S. Pat. No. 5,783,475 (Ramaswami), and U.S. Pat. No. 5,863,824 (Gardner et al.) show L-shaped spacers and separate ion implant processes for the source and drain extensions (eg lightly doped source and drain, LDD) and the source and drain (eg source and drain regions, junction regions).
U.S. Pat. No. 5,501,997 (Lin et al.) shows an ion implant process which produces a lightly doped region where a sidewall spacer patially blocks the implant and a heavily doped region where the spacer does not overlie the substrate. However, the single layer spacer does not provide the thickness control that would be required for source and drain extensions.
U.S. Pat. No. 5,234,850 (Liao) shows an L-shaped spacer with nitride and separate LDD and source and drain implants.
U.S. Pat. No. 5,770,508 (Yeh et al.) shows a process for forming an L-shaped spacer using an oxide layer and an overlying nitride layer, anisotropically etching to form spacers, then removing the nitride layer, leaving an L-shaped oxide spacer. Ions are implanted through the L-shaped spacer to form shallow source and drain extensions under the L-shaped spacer and moderate-depth source and drain extensions beyond the L-shaped spacer. However, the silicon nitride top layer etch does not provide the thickness control required to simultaneously form source and drain extensions and source and drain junction regions.